EVAL-ADM1275EBZ【PDF 43/48 页】BOARD EVALUATION FOR ADM1275

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Data Sheet

ADM1275

PMON_CONFIG

Code: 0xD4, read/write byte. Value after reset: 0x2C.

Modifying the power monitor settings while the power monitor is sampling is not supported. The power monitor must be stopped before

any setting in Table 37 is changed to ensure correct operation and to prevent any potential spurious data and status alerts being generated.

Table 37. Bit Descriptions for PMON_CONFIG Command

Bits

7

6

5

4

3

[2:0]

Bit Name

PMON_MODE

VIN_VOUT_SELECT

VRANGE

Reserved

Reserved

AVERAGING

Settings

0

1

0

1

0

1

0

1

000

001

010

011

100

101

110

111

Description

Default. This setting selects single-shot sampling mode.

This setting selects continuous sampling mode.

Default. The power monitor will sample the input voltage on the SENSE+ pin. On the

ADM1275 -2, this bit should always be written as 0.

The power monitor will sample the output voltage on the VOUT pin.

Sets the voltage input range from 0 V to 6 V (low input voltage range).

Default. Sets the voltage input range from 0 V to 20 V (high input voltage range).

Reserved. This bit must always be written as 0.

Default. This bit must be set to 1 for the power monitor current sense to operate

correctly.

Disables sample averaging for current and voltage.

Sets sample averaging for current and voltage to 2 samples.

Sets sample averaging for current and voltage to 4 samples.

Sets sample averaging for current and voltage to 8 samples.

Sets sample averaging for current and voltage to 16 samples.

Sets sample averaging for current and voltage to 32 samples.

Sets sample averaging for current and voltage to 64 samples.

Sets sample averaging for current and voltage to 128 samples.

ALERT1_CONFIG

Code: 0xD5, read/write word. Value after reset: 0x0000.

This command is supported on the ADM1275 -1 and the ADM1275 -2. The ADM1275 -3 does not have a GPO1/ALERT1/CONV pin.

Table 38. Bit Descriptions for ALERT1_CONFIG Command

Bits

15

14

13

12

11

10

9

8

7

6

Bit Name

FET_HEALTH_BAD_EN1

IOUT_OC_FAULT_EN1

VIN_OV_FAULT_EN1

VIN_UV_FAULT_EN1

CML_ERROR_EN1

IOUT_OC_WARN_EN1

IOUT_WARN2_EN1

VIN_OV_WARN_EN1

VIN_UV_WARN_EN1

VOUT_OV_WARN_EN1

Settings

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

Description

Default. Disables generation of SMBAlert when the FET_HEALTH_BAD bit is set.

Generate SMBAlert when the FET_HEALTH_BAD bit is set.

Default. Disables generation of SMBAlert when the IOUT_OC_FAULT bit is set.

Generate SMBAlert when the IOUT_OC_FAULT bit is set.

Default. Disables generation of SMBAlert when the VIN_OV_FAULT bit is set.

Generate SMBAlert when the VIN_OV_FAULT bit is set.

Default. Disables generation of SMBAlert when the VIN_UV_FAULT bit is set.

Generate SMBAlert when the VIN_UV_FAULT bit is set.

Default. Disables generation of SMBAlert when the CML_ERROR bit is set.

Generate SMBAlert when the CML_ERROR bit is set.

Default. Disables generation of SMBAlert when the IOUT_OC_WARN bit is set.

Generate SMBAlert when the IOUT_OC_WARN bit is set.

Default. Disables generation of SMBAlert when the IOUT_WARN2 bit is set.

Generate SMBAlert when the IOUT_WARN2 bit is set.

Default. Disables generation of SMBAlert when the VIN_OV_WARN bit is set.

Generate SMBAlert when the VIN_OV_WARN bit is set.

Default. Disables generation of SMBAlert when the VIN_UV_WARN bit is set.

Generate SMBAlert when the VIN_UV_WARN bit is set.

Default. Disables generation of SMBAlert when the VOUT_OV_WARN bit is set.

Generate SMBAlert when the VOUT_OV_WARN bit is set.

Rev. D | Page 43 of 48

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